Record the exact sync2 COPY/TRANSFER_WRITE to HOST/HOST_READ buffer dependency over the copied readback range before ending and submitting the existing command buffer. Preserve coherent mapping and queue-idle completion.
Add a portable guard that inspects the descriptor factory used by the live ReadBack path and pins copy, descriptor, barrier, end, and submit order without initializing Vulkan.
Mutations performed and restored:
1. Removed the live post-copy barrier: the guard first failed with Expected copy -> descriptor -> barrier -> end -> submit, got 4260, -1, -1, -1, 4386, 4900.
2. Changed source access to TransferReadBit: the guard first failed Assert.Equal, expected Access2TransferWriteBit, actual Access2TransferReadBit.
3. Moved the correct barrier before the copy: the guard first failed with Expected copy -> descriptor -> barrier -> end -> submit, got 4657, 4260, 4525, 4594, 4783, 5297.
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