From 3813f0bbf2a6f254725edc9c77bf4d71a7a0a34f Mon Sep 17 00:00:00 2001 From: Erik Date: Fri, 4 Sep 2026 06:14:53 +0200 Subject: [PATCH] =?UTF-8?q?docs(overhaul):=20S4-c2=20review=20round=201=20?= =?UTF-8?q?=E2=80=94=20retail=20lens=20FAIL=20recorded;=20fix=20round=201?= =?UTF-8?q?=20contract=20(packet=20=C2=A711,=20M1=E2=80=93M8)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The two-list/router/flush core of 048d5b12f is exact at the bytes; the failures are at the call sites (a data-driven row 5 turned into a throw; detail-surface input hardcoded false while the drain applies detail), the register (the structurally empty CLIP list is undeclared; AP-237's example is wrong; AP-34 not retired by convention), the first-for-list quantifier, the all-KnownFailure gate, and the skipped C4 that turns out to be bounded. Co-Authored-By: Claude Fable 5.1 --- ...-09-01-campaign-overhaul-world-solidity.md | 2 +- .../s4-depth-alpha-packet.md | 39 +++++++++++++++++++ 2 files changed, 40 insertions(+), 1 deletion(-) diff --git a/docs/plans/2026-09-01-campaign-overhaul-world-solidity.md b/docs/plans/2026-09-01-campaign-overhaul-world-solidity.md index f180cc9c..a71e831d 100644 --- a/docs/plans/2026-09-01-campaign-overhaul-world-solidity.md +++ b/docs/plans/2026-09-01-campaign-overhaul-world-solidity.md @@ -674,7 +674,7 @@ Update immediately when a slice changes state. Chat is not the ledger. | S1 | `acf17246`, `b681717c`, `0840d5fb`, `e2543d0e`, `8c6563ca` (+ pin test) | G1 PASS 2026-09-02 | revert newest-first; then restore `acdream.recipe7.pak` over `acdream.pak` in the dev DAT dir (the recipe-8 consumer rejects a recipe-7 pak, and vice versa) | | S2 | `059b8883`, `5a2792d6`, `707d2803`, `afbd2410`, `75ea269d`, `c94a1a40`, `f6b4584b` | G2 PASSED 2026-09-03 (owner-confirmed after the chunk-6 haze fix; terrain punch carried to S4) | revert newest-first `c94a1a40` → `059b8883`; the registry's retail product and the walk's borrowed views go together — do not revert a middle chunk alone | | S3 | chunk 2: `be9b4c1f`, `2f5373c7`, `434a7df2`; chunk 3: `4ee2866a`, `651badc2`, `e10765aa`, `896c63fe`, `74ac7aa2`; chunk 1: `02a82881`, `be81475c`, `88c70072` | G3 | chunk 3: revert newest-first `74ac7aa2` → `4ee2866a` as one unit (the per-cell terrain, the slot key, the deferred batching and the per-frame diagnostic go together); chunk 2: revert newest-first `434a7df2` → `be9b4c1f` (the counter, the leaf split and the flag deletion go together) | -| S4 | — | G3 | OPEN 2026-09-03 night. Packet `docs/research/2026-09-01-overhaul/s4-depth-alpha-packet.md`: §1 records that S3 chunk 2 already delivered S4's chunk-1 latch/gate/seal scope (the latch owner, the gated flush→stamp→clear→seal block, the counted seals); what remains of chunk 1 is small and dispatched as **S4-c1** (`s4-c1.js`, worktree `s4-c1-impl` at `6385f4411`, contract = packet §6): C0 the far-punch constant — `portal_depth.vert` carries `0.99999988` = bits `0x3F7FFFFE`, retail's is `0x3F7FFFEF` (15 ULPs nearer; the depth spec's "wrong constant" row was right; lead bit check 2026-09-03) → retail's exact bits + a source pin; C1 the ±12 local-input reject at both portal-polygon producers (Ghidra table row 0x59BCD6–0x59BD28); C2 the portal-depth color-state register row (ColorWrite off vs retail's zero-alpha blend, identical output); C3 the depth truth-table Theory, the cross-frame latch test, look-ins isolated from the root latch. Chunk 2 = the two-FIFO alpha-list cutover (packet §3); chunk 3 = deletions (packet §4). G3 is S4's owner gate; the lead's S3-state G3 pre-run (20/20 frames, in the S3 row) is the baseline to diff against. | **S4-c1 ROUND 0 = `c7ab5b6d8` (Sonnet), THREE LENSES FAIL (2026-09-03 21:00–21:20):** one BLOCKING defect seen by all three — the ±12 guard's quantifier is inverted (rejects on ANY vertex on ANY plane; retail's PDB-paired bytes at 0x59BCD6–0x59BD66 reject only when EVERY vertex lies on the SAME plane) — and the LEAD's §6 paraphrase carried the same inversion (corrected in §6; lesson saved to memory: quote the decomp predicate, never paraphrase it). The production lens's DAT scan: 2,889 portal polygons carry a ±12 vertex and 2,163 EXIT polygons lie ENTIRELY on a ±12 plane — so the guard is very likely retail's never-sealed 'panel' mechanism (the #456/#465 family), which makes the PM/PC depth-event transcript comparison against the four alphadepth captures the chunk's real gate (never run in round 0). Also: the register-test gate is vacuous (no test reads the register), the manifest comment's ULP direction is inverted. C0 (retail's exact far-punch bits, verified at the binary), C2 (AD-119) and C3 (three new truth-table/latch pins, nine mutation texts) verified. FIX ROUND 1 = S4 packet §7 (`s4-c1-fix1.js`, dispatched 21:20): the four per-plane predicates at both producers with five-case T2, the seal count order, the automated PM/PC gate over the captures (a diverging pose is tagged KnownFailure and written up, never weakened), comment truth. **S4-c2 CONTRACT DRAFTED** (packet §8, 2026-09-03 21:50): two FIFO lists of 3000, the spec §4 router as one pure function, the four flush sites (the sort-cell EXIT valve as a new walk event kind), `FlushFartherThan`/AP-34/every viewer distance deleted, and the AM/FL transcript gate over the five captures (10,556 `AM` lines, all `clip=0`; `FL` by site 13,705/309/18/23) as the proof; dispatched only after c1 lands. **S4-c1 FIX ROUND 1 = `2bd353234` (Sonnet, 295 tool calls), THREE LENSES 2026-09-03 22:07–23:00: retail-faithful PASS, production PASS, gate-honesty FAIL.** Confirmed at the bytes: the four per-plane accumulators at both producers, the count-after-guard order, the PM/PC gate's reading of retail's lines; five transcript poses pass (cathedral-arrival, cathedral-leak, foundry-deep, holtburg-doorway-still) with terrace-edge tagged KnownFailure. Findings, all on that one row plus one pin gap: (blocking) the KnownFailure write-up claims the PC sequence matches — false and never evaluated (the PM assert throws first); (major ×2) the divergence is a harness initial-condition choice — seed `portalsDrawnCount` from the fixture's first observed counter and the row turns green while the two-pass priming retires; (major) T2's five cases do not discriminate 'every vertex on SOME plane' from retail's 'every vertex on the SAME plane'; (minor ×4) stale seal-path summaries, an unobservable mutation named in the F2 pin's comment, doc-comment DAT figures an independent scan does not fully reproduce, a vacuous 'register tests' gate claim. The lead's own replay of the gate at `2bd353234` with the new `cathedral-stair-arch` capture added as a sixth Fact PASSES (its seed value is 8). **FIX ROUND 2 = packet §9 (the LAST round; dispatched 23:10):** seed the counter from the fixture (one pass), compare and print both sequences together, the discriminating ±12 case, the sixth pose, comment truth. **FIX ROUND 2 = `9ba8f013e` (Sonnet; on the two cherry-picked capture commits), THREE LENSES 2026-09-03 23:10–23:38: retail PASS (byte evidence: `portalsDrawnCount` has exactly one increment site 0x59BD74 and one reset site 0x5A489E under `view_count > 0`, `forceClear` has no writer; the discriminating case is admitted by retail's four per-plane accumulators), production PASS (round-2 src diff = comment text only; no pin weakened; gates reproduce on a fresh Release build), gate-honesty FAIL on comment truth only (the terrace-edge Fact's comment claimed a PC match that seeding, not the pre-fix state, produced; the stair-arch comment states a rejection count the PM/PC tuple cannot observe; a DAT-scan comment cites a pin that does not pin). All six transcript poses PASS (terrace-edge's KnownFailure removed; seed values 0/0/1/2/2/8). **S4-c1 LANDED 2026-09-03 23:38–23:40** as `d1e3e64f6` + `5de42a12f` + `323f5a334` (cherry-picks of rounds 0–2) + `766f9e749` (the LEAD corrected the four flagged sentences — a third implementer round is barred by §5; code unchanged; owner to review). Landing gates: Release 0 warnings; six transcript Facts 6/6; hermetic 6,833/6,833; InstalledDat 249 pass / 4 known (#383 ×2, TowerAscent, #458) / 1 skip. Landing self-gates: route.txt four poses `logs/selfgate-20260903-234934-s4c1-landed-route2` (Facility panels present, mean RGB (79,20,25)); capture poses `logs/selfgate-20260903-234030-s4c1-landed-g3b` and `…-235044-s4c1-landed-g3b2` — frames 13/14/16 in band, **frame 15 (holtburg-doorway) shows an empty plane under fog TWICE** where the S3-state run `logs/selfgate-20260903-165634-g3b` showed the village. Lead read 2026-09-04: the server snapped the requested y 13.39→17.39 in every run; the CLIENT then seated the player in the house-interior cell `0xA9B4013F` at (134.07, 17.36) in both landed runs versus the outdoor cell `0xA9B40029` at (133.60, 17.39) in the S3-state run (0.46 m apart on the doorway threshold), so the frame roots from the interior cell with the eye outside — a placement/membership boundary at the doorway, not a draw change; S4-c1 touched no placement code. A pre-S4 control at `6575cfcee` (`s3-review-fix/logs/selfgate-20260904-042324-pre-s4-g3b`) produced 0 frames: the login reveal at `0xA9B40176` never went visible (#462 class) and the process exited 0xE0434352 after the graceful logout (#461 class) → INCONCLUSIVE; the A/B re-run (landed tip twice + pre-S4 once) is owed before any further self-gate is trusted at that pose. **S4-c2 DISPATCH 2026-09-03 23:41 DIED** on the account's session limit / credit exhaustion with no commit; worktree `s4-c2-impl` reset clean at `766f9e749`. Session handed to a new account 2026-09-04 morning; ACE was NOT running at hand-over (no UDP 9000 listener), so every connected gate waits on the owner starting it. **HAND-OFF 2026-09-04 morning:** `docs/research/2026-09-01-overhaul/2026-09-04-s4-handoff.md` (read order, landed state, the S4-c2 implementer dispatched ~08:35 into `s4-c2-impl`, the #464 RenderDoc plan, the Holtburg doorway A/B, owner-owed items, tooling gotchas, paste-prompt). **OWNER 2026-09-04 morning: running `766f9e749`, reports the cathedral stairwell artifact (#464) appears FIXED** — plausible mechanism = S4-c1's ±12 reject now drops the 12 hall-doorway punches retail also rejects; PROVISIONAL until the lead re-runs `route-464-tilt3.txt` at the tip and diffs frame `01-neg160` against `logs/selfgate-20260903-225434-464-tilt3` (owner client running — not launched yet). **S4-c2 IMPLEMENTER DONE 2026-09-04 09:35: `048d5b12f` in `s4-c2-impl`** (19 files, +1,697/−543): two FIFO lists + `RetailAlphaMeshRouter` + `SortCellExit` event + four flush sites, `FlushFartherThan`/viewer distance deleted; hermetic 6,855/6,855; shader classes 32/32; InstalledDat 249 pass + the 4 known + SIX new KnownFailure Facts. Implementer's own deviations for the lead to rule on: (a) C4 (EnvCell transparent subsets through the queue) NOT done; (b) AP-34 not retired but narrowed into AP-236 (EnvCell-immediate residual) + AP-237 (AlphaBlend cannot tell retail's ALPHA from the Translucent+ClipMap CLIP override; cloud GfxObj 0x01004C35); (c) G-c2's per-list drained-count dimension is KnownFailure on ALL six poses because the hermetic harness carries no mesh content — only the (site, threshold) sequence matches. REVIEW ROUND 1 dispatched. +| S4 | — | G3 | OPEN 2026-09-03 night. Packet `docs/research/2026-09-01-overhaul/s4-depth-alpha-packet.md`: §1 records that S3 chunk 2 already delivered S4's chunk-1 latch/gate/seal scope (the latch owner, the gated flush→stamp→clear→seal block, the counted seals); what remains of chunk 1 is small and dispatched as **S4-c1** (`s4-c1.js`, worktree `s4-c1-impl` at `6385f4411`, contract = packet §6): C0 the far-punch constant — `portal_depth.vert` carries `0.99999988` = bits `0x3F7FFFFE`, retail's is `0x3F7FFFEF` (15 ULPs nearer; the depth spec's "wrong constant" row was right; lead bit check 2026-09-03) → retail's exact bits + a source pin; C1 the ±12 local-input reject at both portal-polygon producers (Ghidra table row 0x59BCD6–0x59BD28); C2 the portal-depth color-state register row (ColorWrite off vs retail's zero-alpha blend, identical output); C3 the depth truth-table Theory, the cross-frame latch test, look-ins isolated from the root latch. Chunk 2 = the two-FIFO alpha-list cutover (packet §3); chunk 3 = deletions (packet §4). G3 is S4's owner gate; the lead's S3-state G3 pre-run (20/20 frames, in the S3 row) is the baseline to diff against. | **S4-c1 ROUND 0 = `c7ab5b6d8` (Sonnet), THREE LENSES FAIL (2026-09-03 21:00–21:20):** one BLOCKING defect seen by all three — the ±12 guard's quantifier is inverted (rejects on ANY vertex on ANY plane; retail's PDB-paired bytes at 0x59BCD6–0x59BD66 reject only when EVERY vertex lies on the SAME plane) — and the LEAD's §6 paraphrase carried the same inversion (corrected in §6; lesson saved to memory: quote the decomp predicate, never paraphrase it). The production lens's DAT scan: 2,889 portal polygons carry a ±12 vertex and 2,163 EXIT polygons lie ENTIRELY on a ±12 plane — so the guard is very likely retail's never-sealed 'panel' mechanism (the #456/#465 family), which makes the PM/PC depth-event transcript comparison against the four alphadepth captures the chunk's real gate (never run in round 0). Also: the register-test gate is vacuous (no test reads the register), the manifest comment's ULP direction is inverted. C0 (retail's exact far-punch bits, verified at the binary), C2 (AD-119) and C3 (three new truth-table/latch pins, nine mutation texts) verified. FIX ROUND 1 = S4 packet §7 (`s4-c1-fix1.js`, dispatched 21:20): the four per-plane predicates at both producers with five-case T2, the seal count order, the automated PM/PC gate over the captures (a diverging pose is tagged KnownFailure and written up, never weakened), comment truth. **S4-c2 CONTRACT DRAFTED** (packet §8, 2026-09-03 21:50): two FIFO lists of 3000, the spec §4 router as one pure function, the four flush sites (the sort-cell EXIT valve as a new walk event kind), `FlushFartherThan`/AP-34/every viewer distance deleted, and the AM/FL transcript gate over the five captures (10,556 `AM` lines, all `clip=0`; `FL` by site 13,705/309/18/23) as the proof; dispatched only after c1 lands. **S4-c1 FIX ROUND 1 = `2bd353234` (Sonnet, 295 tool calls), THREE LENSES 2026-09-03 22:07–23:00: retail-faithful PASS, production PASS, gate-honesty FAIL.** Confirmed at the bytes: the four per-plane accumulators at both producers, the count-after-guard order, the PM/PC gate's reading of retail's lines; five transcript poses pass (cathedral-arrival, cathedral-leak, foundry-deep, holtburg-doorway-still) with terrace-edge tagged KnownFailure. Findings, all on that one row plus one pin gap: (blocking) the KnownFailure write-up claims the PC sequence matches — false and never evaluated (the PM assert throws first); (major ×2) the divergence is a harness initial-condition choice — seed `portalsDrawnCount` from the fixture's first observed counter and the row turns green while the two-pass priming retires; (major) T2's five cases do not discriminate 'every vertex on SOME plane' from retail's 'every vertex on the SAME plane'; (minor ×4) stale seal-path summaries, an unobservable mutation named in the F2 pin's comment, doc-comment DAT figures an independent scan does not fully reproduce, a vacuous 'register tests' gate claim. The lead's own replay of the gate at `2bd353234` with the new `cathedral-stair-arch` capture added as a sixth Fact PASSES (its seed value is 8). **FIX ROUND 2 = packet §9 (the LAST round; dispatched 23:10):** seed the counter from the fixture (one pass), compare and print both sequences together, the discriminating ±12 case, the sixth pose, comment truth. **FIX ROUND 2 = `9ba8f013e` (Sonnet; on the two cherry-picked capture commits), THREE LENSES 2026-09-03 23:10–23:38: retail PASS (byte evidence: `portalsDrawnCount` has exactly one increment site 0x59BD74 and one reset site 0x5A489E under `view_count > 0`, `forceClear` has no writer; the discriminating case is admitted by retail's four per-plane accumulators), production PASS (round-2 src diff = comment text only; no pin weakened; gates reproduce on a fresh Release build), gate-honesty FAIL on comment truth only (the terrace-edge Fact's comment claimed a PC match that seeding, not the pre-fix state, produced; the stair-arch comment states a rejection count the PM/PC tuple cannot observe; a DAT-scan comment cites a pin that does not pin). All six transcript poses PASS (terrace-edge's KnownFailure removed; seed values 0/0/1/2/2/8). **S4-c1 LANDED 2026-09-03 23:38–23:40** as `d1e3e64f6` + `5de42a12f` + `323f5a334` (cherry-picks of rounds 0–2) + `766f9e749` (the LEAD corrected the four flagged sentences — a third implementer round is barred by §5; code unchanged; owner to review). Landing gates: Release 0 warnings; six transcript Facts 6/6; hermetic 6,833/6,833; InstalledDat 249 pass / 4 known (#383 ×2, TowerAscent, #458) / 1 skip. Landing self-gates: route.txt four poses `logs/selfgate-20260903-234934-s4c1-landed-route2` (Facility panels present, mean RGB (79,20,25)); capture poses `logs/selfgate-20260903-234030-s4c1-landed-g3b` and `…-235044-s4c1-landed-g3b2` — frames 13/14/16 in band, **frame 15 (holtburg-doorway) shows an empty plane under fog TWICE** where the S3-state run `logs/selfgate-20260903-165634-g3b` showed the village. Lead read 2026-09-04: the server snapped the requested y 13.39→17.39 in every run; the CLIENT then seated the player in the house-interior cell `0xA9B4013F` at (134.07, 17.36) in both landed runs versus the outdoor cell `0xA9B40029` at (133.60, 17.39) in the S3-state run (0.46 m apart on the doorway threshold), so the frame roots from the interior cell with the eye outside — a placement/membership boundary at the doorway, not a draw change; S4-c1 touched no placement code. A pre-S4 control at `6575cfcee` (`s3-review-fix/logs/selfgate-20260904-042324-pre-s4-g3b`) produced 0 frames: the login reveal at `0xA9B40176` never went visible (#462 class) and the process exited 0xE0434352 after the graceful logout (#461 class) → INCONCLUSIVE; the A/B re-run (landed tip twice + pre-S4 once) is owed before any further self-gate is trusted at that pose. **S4-c2 DISPATCH 2026-09-03 23:41 DIED** on the account's session limit / credit exhaustion with no commit; worktree `s4-c2-impl` reset clean at `766f9e749`. Session handed to a new account 2026-09-04 morning; ACE was NOT running at hand-over (no UDP 9000 listener), so every connected gate waits on the owner starting it. **HAND-OFF 2026-09-04 morning:** `docs/research/2026-09-01-overhaul/2026-09-04-s4-handoff.md` (read order, landed state, the S4-c2 implementer dispatched ~08:35 into `s4-c2-impl`, the #464 RenderDoc plan, the Holtburg doorway A/B, owner-owed items, tooling gotchas, paste-prompt). **OWNER 2026-09-04 morning: running `766f9e749`, reports the cathedral stairwell artifact (#464) appears FIXED** — plausible mechanism = S4-c1's ±12 reject now drops the 12 hall-doorway punches retail also rejects; PROVISIONAL until the lead re-runs `route-464-tilt3.txt` at the tip and diffs frame `01-neg160` against `logs/selfgate-20260903-225434-464-tilt3` (owner client running — not launched yet). **S4-c2 IMPLEMENTER DONE 2026-09-04 09:35: `048d5b12f` in `s4-c2-impl`** (19 files, +1,697/−543): two FIFO lists + `RetailAlphaMeshRouter` + `SortCellExit` event + four flush sites, `FlushFartherThan`/viewer distance deleted; hermetic 6,855/6,855; shader classes 32/32; InstalledDat 249 pass + the 4 known + SIX new KnownFailure Facts. Implementer's own deviations for the lead to rule on: (a) C4 (EnvCell transparent subsets through the queue) NOT done; (b) AP-34 not retired but narrowed into AP-236 (EnvCell-immediate residual) + AP-237 (AlphaBlend cannot tell retail's ALPHA from the Translucent+ClipMap CLIP override; cloud GfxObj 0x01004C35); (c) G-c2's per-list drained-count dimension is KnownFailure on ALL six poses because the hermetic harness carries no mesh content — only the (site, threshold) sequence matches. REVIEW ROUND 1 dispatched. **REVIEW ROUND 1 (2026-09-04 ~10:00–10:40): retail lens FAIL** — every core predicate confirmed exact at the bytes (list select, 0xbb8 capacity, `test ah,5; jp` strict-less on both counts → 2250 drains, CLIP-then-ALPHA, rows 1–5, the four call sites, ::flush=0.75f, delay 0x0E, SortCellExit at 0x5a1a07 under the DrawSortCell gate); BLOCKING: the particle site's 'rows 1/2/4/5 unreachable' assert throws on an Opaque-classified mesh-particle batch (data-driven row 5; `TryAppendMeshDraws` filters nothing); MAJOR: the CLIP list is structurally unreachable for ordinary content (ClipMap kinds are `IsOpaque`, drawn alpha-to-coverage; 4,183/10,556 captured AM entries are CLIP) with no register row; contract C3's detail input hardcoded false while building shells reach the alpha path and the DRAIN applies the detail pass retail's replay never has (`DrawBuilding` installs `building_detail_surface` @0x0059f2eb before its flush/shell draw → row 1 immediate); `IsFirstForList` = first-since-drain where retail's `new` is per-DrawMesh-invocation (`0059d4cc/0059d4d0`; captures new=1 on 9,685/10,556); gate G-c2 all-KnownFailure → zero CI signal and zero SortCellExit drains exercised; MINOR: AP-237's cloud example is disproven (Type 0x10114 carries alpha-family bits → mask 0x02 both sides), DrawBlock cited at its loop head 0x005a18d0 instead of 0x005a17c0, 'return site' = the call address. Lead verification concurs and adds C4 (EnvCell detail-off append is bounded — `RenderTransparentOrdered` exists). **FIX ROUND 1 = packet §11 (M1–M8)**; production/gate lens pending at the time of writing (addendum to §11 when it reports). | S5 | — | G4 | fill | --- diff --git a/docs/research/2026-09-01-overhaul/s4-depth-alpha-packet.md b/docs/research/2026-09-01-overhaul/s4-depth-alpha-packet.md index ad422b96..d82080a9 100644 --- a/docs/research/2026-09-01-overhaul/s4-depth-alpha-packet.md +++ b/docs/research/2026-09-01-overhaul/s4-depth-alpha-packet.md @@ -458,3 +458,42 @@ PASS/FAIL with file:line findings; two fix rounds maximum, then the ledger. **Gates (all reproduced by the lenses, none claimed vacuously):** Release build 0 warnings; hermetic lane green; InstalledDat lane with ONLY the pre-existing #383 ×2, TowerAscent, #458 KnownFailure failures (terrace-edge must no longer be among them); all six transcript Facts green; the shader classes green. One commit on top of `2bd353234` in `s4-c1-impl`. **Lenses (sequential, session model, narrowed to the round-2 diff):** retail-faithful (R2-3's predicate and R2-2's seeding argued from the bytes/decomp — the counter's persistence across frames at `PView::DrawCells` and the reset site), gate-honesty (every sentence in the commit body and every test doc comment is something the tests evaluate; both sequences compared together), production (no allocation/behavior change outside the test project except R2-5(a) comments). + +> §10 (the implementer's S4-c2 landing note) lives in the chunk commit `048d5b12f` in worktree `s4-c2-impl` and arrives with the cherry-pick; §11 below was written on the campaign branch so the fixer reads it from here. + +## 11. S4-c2 fix round 1 (lead, 2026-09-04 — after the two-lens review of `048d5b12f`; round 1 of the two the plan allows) + +**Verdicts on `048d5b12f` (worktree `s4-c2-impl`, on `766f9e749`):** retail-faithful lens +FAIL (one blocking, four major, three minor — every predicate of the core port confirmed exact +against the bytes: `AddMeshToAlphaList` @0x0059C230 list select/capacity/return, +`FlushAlphaList` @0x0059D2E0 early-return `test ah,5; jp` = strict-less on BOTH counts so 2250 +drains, CLIP-then-ALPHA drain, `DrawMesh` @0x0059D4A0 rows 1–5, the four call sites' bytes and +symbol ranges, `::flush` = 0.75f @0x820ed0, `s_AlphaDelayMask` = 0x0E @0x820d88, +`MultiPassAlpha` = 0 @0x81ef96, `alwaysDrawObjects` = 1 @0x820ed4, `SortCellExit` placed at +DrawBlock's `0x5a19e6 DrawSortCell → 0x5a1a07 FlushAlphaList` under the same gate); lead +verification agrees on every one of those and adds the C4 ruling. Production/gate lens: see +the addendum at the end of this section when it reports. The failures are at the three call +sites, the register, and the gate's CI value — the list/router/flush core stands. + +**Items (each is a contract; quote decomp predicates, never paraphrase — `feedback_quote_decomp_predicates`; every new or changed pin carries a mutation text in the commit body — `feedback_every_new_pin_must_be_shown_to_fail`):** + +**M1 (BLOCKING) — the particle site throws on a data-driven row.** `ParticleRenderer.TryAppendMeshDraws` (`ParticleRenderer.cs:645-663`) appends EVERY `renderData.Batches[i]` with `IndexCount > 0` and an assigned texture; `ObjectRenderBatch.Translucency` is the mesh classification (`ObjectMeshManager.cs:2253`), so `TranslucencyKind.Opaque` is an ordinary value for a `FullMesh` particle GfxObj → `MaskFromTranslucencyKind(Opaque) = 0x00` → `Route(..., mask 0x00, materialHasAlpha:false)` → row 5 `Immediate` → the `InvalidOperationException` at `ParticleRenderer.cs:361-372` fires in the render loop. Retail defines row 5 (`0x0059d58c RenderMeshSubset`, draw now) and row 4 (`(delayMask & 4) != 0 && material != 0 && *(material+8) != 0` → append ALPHA). Fix: (a) delete the throw at BOTH sites (`ParticleRenderer.cs:361-372`, `WbDrawDispatcher.SubmitToAlphaQueue`) — a router row is a data-driven outcome, never an invariant (`feedback_retail_dispatch_is_data_driven`); (b) for particles derive `materialHasAlpha` from retail's particle material: find where the emitter's `CMaterial` is created/`translucency` set (grep `ParticleEmitter::` / `CParticle` / `CMaterial::has_alpha` in the named pseudo-C; `has_alpha` is the field at `+0x8` DrawMesh row 4 reads) and QUOTE the rule (expected: a particle whose translucency < 1 or whose material carries alpha has `has_alpha != 0` → row 4 ALPHA; a fully opaque particle material → row 5 immediate); (c) implement the immediate outcome for rows 1/5 at the particle site by drawing the submission now through the existing non-deferring particle draw path (the same code `DrawOrdered`/`DrawOrderedRhi` uses for one submission) — no new renderer; (d) pins: an Opaque-classified mesh-particle batch with has_alpha routes to ALPHA and is drawn at the flush; the same batch with no material alpha draws immediately and never enters a list; mutation text for each. + +**M2 (MAJOR) — the CLIP list is structurally unreachable for ordinary content, undeclared.** `WbDrawDispatcher.IsOpaque(t) => t == Opaque || t == ClipMap` (`WbDrawDispatcher.cs:3567`) keeps every clip-mapped subset out of `_translucentDraws`/`SubmitWalkAlphaInstance`; retail's `ConstructMesh` gives them mask 0x08 → row 3 → CLIP, and the six captures show 4,183 of 10,556 `AM` lines on CLIP (e.g. the §10 quotes `(DrawBuilding,0,158,452)`: 158 CLIP entries acdream reports as 0). Fix (no pipeline change in this round — the alpha-to-coverage treatment of clip-mapped surfaces predates S4 and is a VisualMaster-era translucency decision): file a NEW AP row stating exactly this — clip-mapped GfxObj/scenery/building subsets draw immediately on the `OpaqueAlphaToCoverage` pipeline and never enter retail's CLIP FIFO; consequence = compositing in draw-call order instead of retail's deferred CLIP drain (depth-writing cutouts, so ordering is mostly invisible; edges differ by the older alpha-to-coverage choice); the only CLIP-list feeders left are clip-mapped mesh PARTICLES; cite `D3DPolyRender::ConstructMesh` 0x0059DFA0 / `DrawMesh` 0x0059D4A0 row 3 / `AddMeshToAlphaList` 0x0059C230 — and correct AP-236's sentence "the ONE residual AP-34 documented that this chunk does NOT fix" (false: there are two, this and EnvCell). + +**M3 (MAJOR) — contract C3's detail-surface input is hardcoded false and the drain applies detail.** Retail `DrawBuilding` @0x0059f2a0: `0059f2eb curr_detail_surface = building_detail_surface; 0059f30b FlushAlphaList(0f); 0059f31d CPhysicsPart::Draw(parts,1); 0059f336 CPhysicsPart::Draw(parts,0); 0059f345 curr_detail_surface = nullptr` → with a non-null building detail EVERY shell subset takes row 1 (immediate, WITH detail); the delayed replay always passes `detailEnabled = 0` (`FlushAlphaList` @0x0059d3c7/@0x0059d45d call `RenderMeshSubset(..., 0, entry.clip, ...)`). acdream: `SubmitToAlphaQueue` passes `detailSurfaceActive:false` while building shells DO reach the alpha path (`WalkClassify.cs:310 detailCategory = entity.IsBuildingShell ? 1u : 0u`) and `DrawPreparedAlphaBatchRhi` (`WbDrawDispatcher.Rhi.cs:642-694`) runs the detail pass ON THE DRAIN — the exact state spec §4 says replay never has. Fix: (a) router input `detailSurfaceActive = entity.IsBuildingShell && RetailDetailTextureContract.ShouldRender(_buildingDetailEnabled(), _buildingDetail)` at both Wb sites (the walk site knows the entity; `DeferTransparentGroups` must carry the category per instance — it already has `DetailCategories`); (b) row 1 for a translucent building-shell instance = draw it NOW at its own turn (adaptation: retail draws the subset in place inside the mesh; the walk's opaque instances are stream-batched, so "now" = at the entity's stream mark, i.e. when Replay reaches that instance's `AlphaSubmitMark`) through a new single-instance immediate draw on the alpha source — bind the blend pipeline, one indirect draw, then the detail pass — reusing `DrawPreparedAlphaBatchRhi`'s pipeline/detail code; (c) the drain never applies detail: delete the `hasDetail`/`DrawBuildingDetailRangeRhi` branch from `DrawPreparedAlphaBatchRhi` (retail replay is `detailEnabled = 0`); (d) a register row for the "in place → at the entity's stream mark" granularity adaptation; (e) pins: a translucent building-shell instance with building detail ON draws at its turn with the detail pass and never enters a list; with detail OFF it is appended and drained WITHOUT detail; an ordinary (non-shell) translucent instance is unaffected by the detail flag; mutation texts. + +**M4 (MAJOR) — `IsFirstForList` has the wrong quantifier.** Retail: `0059d4cc arg3 = 1; 0059d4d0 var_c = 1` at `DrawMesh` ENTRY, cleared after the first append to each list within THAT call (`0059d5ef if (var_4_1 == 0) var_c = 0; else arg3 = 0;`); spec §5: "Each DrawMesh invocation owns two independent first-for-this-list flags"; the captures: `new=1` on 9,685 of 10,556 `AM` lines — impossible under "first since the last drain" (`RetailAlphaQueue.TryAppend` `isFirstForList = target.Count == 0`). Each acdream append is one instance = its own DrawMesh call, so the truthful port is `IsFirstForList = true` on every append — or delete the field. Fix: choose one, fix the doc comments (`RetailAlphaEntry`, `RetailAlphaQueue.TryAppend`, `WalkAlphaDepthTrace`'s "new" comment), delete or rewrite `TryAppend_FlagsOnlyTheFirstEntrySinceTheLastDrain` (a pin of the wrong semantic), mutation text if a pin remains. + +**M5 (MAJOR) — gate G-c2 has no CI signal.** All six `AlphaFlushTranscript_*` Facts are `Status=KnownFailure`, so the ONE dimension the harness proves (the (site, threshold) sequence) is excluded from the hermetic lane and expected-red in InstalledDat; a future site-sequence regression is invisible. Also the sequence contains zero `SortCellExit` entries in every pose (0 < 2250 on both sides), so the gate exercises nothing the chunk added. Fix: split over the SAME replay into `AlphaFlushSites__MatchesRetailFrame2` (live in the lane, asserts (site, threshold) only) and `AlphaFlushCounts__MatchesRetailFrame2` (KnownFailure). Rewrite the KnownFailure reason truthfully in the Facts' doc comments AND packet §10: the counts can never match by construction — (1) this harness has no mesh content, (2) acdream appends one entry per INSTANCE where retail appends one per SUBSET per DrawMesh, (3) acdream's CLIP list is empty for ordinary content (M2) — not "harness content only". Add ONE live pin that exercises the valve the chunk added: a driver test where ≥2250 entries sit in a list when the SortCellExit event replays and the drain fires there (and 2249 does not) — `RetailAlphaQueueTests` has the boundary; this one goes through `WalkFrameDriver.Replay`'s `SortCellExit` arm; mutation text. + +**M6 (MAJOR) — contract C4 (EnvCell) is smaller than claimed; do it.** Retail `DrawEnvCell` @0x0059f1c2 sets `curr_detail_surface = environment_detail_surface` (may be null) before `DrawMesh` @0x0059f212 and clears it @0x0059f21a: detail ON → row 1 immediate (acdream already matches — `EnvCellRenderer.Rhi.cs:254 detailEnabled`); detail OFF → row 3 append (mask from the cell surface: alpha-family → 0x02 ALPHA). `EnvCellRenderer.RenderTransparentOrdered(IReadOnlyList)` (`EnvCellRenderer.cs:828`) already replays a cell's transparent batch on demand, so no "new deferred-replay abstraction" is needed. Fix: an EnvCell `IRetailAlphaDrawSource` owned by `RetailPViewPassExecutor`: `WalkProductionLeafRenderer.DrawCellShell` (`RetailPViewPassExecutor.WalkLeaf.cs:262`) appends ONE token (the cellId) to ALPHA when `detailEnabled == false` (route through the router with the shell's mask so the decision is the table's, not a hand-coded branch), draws immediately when `detailEnabled == true` (today's path); `PrepareAlphaDraws` collects the cell ids in token order; `DrawPreparedAlphaBatch(first, count)` calls `RenderTransparentOrdered` on that slice. One token per cell is coarser than retail's per-subset entries — AP-236 shrinks to exactly that granularity residual (rewrite the row; drop its "substantial separate architecture change" text). Pins: detail-off cell shell is drained at the next AlphaBarrier/LandscapeFlush/pass end and never before; detail-on draws at its turn; a particle appended between two cell tokens keeps its position (adjacent-only batching); mutation texts. + +**M7 (MINOR) — AP-237's only cited example is disproven.** `TranslucencyKind.cs:65-68` records cloud surface `0x08000023` as `Type=0x10114` = ADDITIVE|ALPHA|TRANSLUCENT|BASE1_CLIPMAP; `0x10114 & 0x10300 ≠ 0` → retail mask 0x02 → ALPHA — identical to the port. The abstract class (Translucent+ClipMap with NO alpha-family bit) may still exist: run a DAT scan over every Surface (`SurfaceType` bits: Translucent 0x10, Base1ClipMap 0x04, alpha family 0x00010300) and either cite a real instance (id, type, where used) or rewrite AP-237 as "no known instance in the installed DATs (scan date, count scanned)"; delete "extremely narrow… only known example is the cloud GfxObj". + +**M8 (MINOR) — citations and register convention.** (a) `RenderDeviceD3D::DrawBlock` is @0x005a17c0 (symbols.json); 0x005a18d0 is its loop head — fix `RetailAlphaQueue.cs:41`, `RetailPViewPassExecutor.cs:350`, `WalkEvents.cs:159`, `WalkFrameDriver.cs:242,1479`, `RetailFrameWalk.cs:250`. (b) `RetailAlphaQueue.cs:39-50` label the CALL instructions (0x0059f30b / 0x005a1a07 / 0x005a4872 / 0x00453b8b) as "return site"; the return addresses are +5 (0059f310 / 005a1a0c / 005a4877 / 00453b90) — say "call at … (returns to …)". (c) Register: keep `~~AP-34~~` struck through with "RETIRED 2026-09-04 (S4-c2) — residuals AP-236 / AP-237 / " per the register's own convention (see `~~AP-28~~`, `~~AD-23~~`), fix AP-236's lead sentence ("retired, not narrowed" contradicts its content), and update the "## 3. Approximation (AP) — N active rows" header count. (d) `docs/architecture/worldbuilder-inventory.md:420` cites AP-34 — update it (that file is added to this round's allowed list). + +**Gates (real output lines in the commit body; a lens reproduces each):** Release build 0 warnings; hermetic lane green; InstalledDat lane = the four pre-existing failures + the six `AlphaFlushCounts_*` KnownFailure Facts (and NOTHING else — the six `AlphaFlushSites_*` Facts pass in the lane); shader classes; `RetailAlphaQueueTests`, `RetailAlphaMeshRouterTests`, `RetailFrameWalkTests`, `WalkFrameDriverTests`, `ParticleRenderer*Tests`, `EnvCellRenderer*Tests` classes green. Allowed files: src/AcDream.App, tests/AcDream.App.Tests, docs/architecture/retail-divergence-register.md, docs/architecture/worldbuilder-inventory.md (line 420 only), this packet (§10 correction + a "§11 result" note). One commit on top of `048d5b12f` in `s4-c2-impl`. Must NOT: reintroduce any distance; change the alpha-to-coverage classification of clip-mapped surfaces (M2 is a register row this round); touch S4-c1's punch/seal machinery; add flush sites. + +**Lenses after the round:** retail-faithful (narrowed to M1/M3/M6's decomp claims and the router inputs) and production/gate-honesty (the six live Sites Facts, the valve pin, the immediate-draw paths' allocation, the register). A third round stops the chunk (plan §5). +