docs(perf): record corrected Slice A RDP baselines
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@ -2,7 +2,8 @@
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**Date:** 2026-07-24
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**Status:** Planning complete; implementation not started
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**Status:** Slice A tooling and diagnostic RDP baselines landed; Slice B active.
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The physical-local Slice A gate still blocks Slice C.
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**Scope:** Reconcile and sequence the existing Modern Pipeline (`MP`) and
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Linux/headless (`LH`) tracks using the 2026-07-24 connected performance audit.
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@ -569,6 +570,16 @@ capped-local nine-stop baselines, a pinned dense-town uncapped baseline
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(name the town, pin the camera), and per-portal allocation/frame timelines
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around each teleport materialization.
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**Progress (2026-07-24):** the corrected GL timer, per-frame history, process
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counter/trace capture, screenshot comparison, reference configuration, binary
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provenance, and route-bound stationary sampling have landed. Corrected capped
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and uncapped nine-stop RDP routes, a pinned dense-Arwic RDP sample, observer
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effect, portal windows, and contention stacks are committed in
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[`../research/2026-07-24-slice-a-rdp-baselines.md`](../research/2026-07-24-slice-a-rdp-baselines.md)
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and its machine-readable companion. They prove the tooling is usable but are
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diagnostic-only. The physical-local AMD-display repetitions remain required,
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so Slice C is still blocked. Slice B is baseline-independent and is now active.
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### Slice B — Finish MP1b EnvCell dedup and full bake
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**Purpose:** Make the existing pak physically usable.
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@ -1103,15 +1114,14 @@ an improvement" carries the same evidence burden as a regression claim.
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---
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## 14. Recommended starting point
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## 14. Current execution point
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Begin with **Slice A**, then **Slice B**.
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Slice A is small and makes all later GPU and frame gates honest. Slice B completes
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an implementation already present in the tree and directly attacks the
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benchmark's largest allocation source. The first meaningful runtime cutover is
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Slice C; do not begin the render-scene migration before the portal content storm
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has been removed and measured.
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Slice A's tooling and diagnostic RDP evidence are complete. Its physical-local
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exit gate remains open. Execute **Slice B** now: it is baseline-independent,
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completes an implementation already present in the tree, and directly attacks
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the benchmark's largest process-wide allocation source. Do not start Slice C
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until the capped/uncapped nine-stop and pinned dense-Arwic routes have been
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repeated on the physical local AMD display path and committed.
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The intended order is therefore:
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